55AA Security Lab

55AA-006

Computer Organization

Level
Undergraduate
Status
Under development

Note: this course is still being designed and calibrated; the page content is for reference and does not represent the final teaching version.

Syllabus

Course Overview

Computer Organization explains the layers from logic gates to executable programs: digital logic, datapaths, controllers, ISAs, assembly, memory, and I/O. The goal is for students to understand the machine underneath software instead of treating hardware as a black box.

This is the low-level foundation for assembly, systems programming, architecture, operating systems, and trusted computing.

Prerequisites

  • Programming fundamentals and basic discrete mathematics.
  • Ability to read simple C programs and understand binary representation.
  • Willingness to complete hardware-description or simulation labs.

Learning Outcomes

  • Explain digital circuits, combinational logic, and sequential logic.
  • Construct basic datapaths and controllers.
  • Understand instruction encoding, calling conventions, and memory access.
  • Analyze basic behavior of caches, pipelines, and I/O.
  • Map high-level language behavior to machine-level execution.

Course Format

  • Two meetings per week: one for core concepts and one for labs, paper discussion, or project review.
  • The course proceeds over 16 weeks, each with a checkable assignment, lab, or project milestone.
  • Reproducibility is required: code, configuration, data, lab logs, and reports must be reviewable by staff or peers.

Weekly Plan

Week 1
Week 2

Information representation and Boolean logic: lab and review

Complete integer, floating-point, and logic-circuit exercises. Complete the paired lab, record issues, and explain design tradeoffs in class review.

Session 3Information representation and Boolean logic: lab and review: Concepts, Cases, and Method90 minSession 4Information representation and Boolean logic: lab and review: Lab, Review, and Transfer90 min
Week 3
Week 4

Combinational and sequential logic: lab and review

Implement an ALU and register file. Complete the paired lab, record issues, and explain design tradeoffs in class review.

Session 7Combinational and sequential logic: lab and review: Concepts, Cases, and Method90 minSession 8Combinational and sequential logic: lab and review: Lab, Review, and Transfer90 min
Week 5
Week 6

Instruction sets from the assembly view: lab and review

Trace instruction execution and call stacks by hand. Complete the paired lab, record issues, and explain design tradeoffs in class review.

Session 11Instruction sets from the assembly view: lab and review: Concepts, Cases, and Method90 minSession 12Instruction sets from the assembly view: lab and review: Lab, Review, and Transfer90 min
Week 7
Week 8

Single-cycle and multi-cycle datapaths: lab and review

Extend a teaching CPU with one instruction. Complete the paired lab, record issues, and explain design tradeoffs in class review.

Session 15Single-cycle and multi-cycle datapaths: lab and review: Concepts, Cases, and Method90 minSession 16Single-cycle and multi-cycle datapaths: lab and review: Lab, Review, and Transfer90 min
Week 9
Week 10

Pipelines and hazards: lab and review

Analyze data and control hazards. Complete the paired lab, record issues, and explain design tradeoffs in class review.

Session 19Pipelines and hazards: lab and review: Concepts, Cases, and Method90 minSession 20Pipelines and hazards: lab and review: Lab, Review, and Transfer90 min
Week 11
Week 12

Memory hierarchy and caches: lab and review

Measure the impact of locality on program behavior. Complete the paired lab, record issues, and explain design tradeoffs in class review.

Session 23Memory hierarchy and caches: lab and review: Concepts, Cases, and Method90 minSession 24Memory hierarchy and caches: lab and review: Lab, Review, and Transfer90 min
Week 13
Week 14

I/O, interrupts, and buses: lab and review

Explain the full path of a device interaction. Complete the paired lab, record issues, and explain design tradeoffs in class review.

Session 27I/O, interrupts, and buses: lab and review: Concepts, Cases, and Method90 minSession 28I/O, interrupts, and buses: lab and review: Lab, Review, and Transfer90 min
Week 15
Week 16

From organization to systems software: lab and review

Submit the processor lab and machine-level analysis report. Complete the paired lab, record issues, and explain design tradeoffs in class review.

Session 31From organization to systems software: lab and review: Concepts, Cases, and Method90 minSession 32From organization to systems software: lab and review: Lab, Review, and Transfer90 min

Assessment

Individual assignments

Concept questions, reading responses, design tasks, and small programming or lab exercises.

25%
Labs and project

Hardware or simulator labs, test programs, and machine-level explanations.

40%
Participation and review

Participation in discussions, demos, code or paper reviews, and peer feedback.

10%
Final report and defense

Submit reproducible artifacts, a technical report, and a demo explaining methods, results, limitations, and future work.

25%

Course Project

Students implement or extend a teaching processor, assembler, or simulator and prove correctness with test programs.

Policies

  • AI tools are allowed, but generated code, lab notes, and design suggestions must be reviewed by the student and disclosed in the report.
  • Students may not submit code, proofs, configuration, or experimental results they cannot explain; each member must defend their own design, tests, and tradeoffs.
  • Late work affects iteration grades, but the course values reproducible, auditable, and maintainable results over last-minute accumulation.

Reference Courses

International

China 985 Universities